Atmel Introduces a Re-programmable Rad-hard FPGA With Built-in Single Event Upset (SEU) Protection for Space Applications

Developed for low gate count rad-hard designs, the AT40KEL040 offers up to 50K usable ASIC gates and 18-Kbit user-configurable SRAM blocks. It is a cost-effective alternative to mask configured ASICs offering an easy development flow with no Non Recurrent Engineering (NRE cost), shorter time-to-market and no minimum order quantity. The AT40KEL040 is the first product in a family of Atmel rad-hard FPGA, which will eventually enable system makers to develop customized designs up to 200K usable ASIC gates, for aerospace electronics, robots, scientific instruments, or embarked systems.

Produced on Atmel's radiation hardened 0.35 um CMOS process, the AT40KEL040 combines rad-hard capabilities -- a latch-up threshold higher than 70-MeV.cm2/mg and a total dose in excess of 200 Krad -- with a 60 MHz system speed over the full military temperature range. Hardened by design, the AT40KEL040 configuration memory has a very low sensitivity to SEU, resulting in an upset rate lower than 3E-6 error per device per day in the worst orbit conditions. This innovative built-in SEU protection allows the user to design his/her application without using time-consuming mitigation techniques that can triple FPGA used gate count, thus saving expensive development resources and FPGA cost.

Derived form Atmel commercial AT40K FPGAs series, specifically designed for compute-intensive DSP functions, the AT40KEL040 includes features such as user-configurable SRAM blocks. This single/dual port synchronous/asynchronous SRAM operates at 18 ns. The architecture is optimised for efficient and ultra-fast array multipliers (up to 32 MHz) implementation. The AT40KEL040 also offers the ability to implement Cache Logic(R) design, where part of the FPGA can be re-programmed without loss of register data, while the remainder of the FPGA continues to operate without disruption. This in-system dynamic reconfiguration ability is a direct result of the RECONF project, funded by the European Commission.

To configure the AT40KEL040, a 1-Mbit maximum bit stream is needed. For this function, Atmel offers to use its AT17LV010-10DP, a 1-Mbit serial 3.3-Volt EEPROM, hermetically packaged and qualified to the standard space quality screening flows.

"Thanks to Atmel's expertise in SEU hardening of logic functions, the full or partial in-system dynamic re-configuration is now possible for space system designs. This new rad-hard FPGA series will also give our space customers a very well-adapted alternative and economical solution for their low gate count designs," said Amar Guennoun, Atmel's Aerospace Marketing Director. "Atmel is now the only supplier offering a full range of system integration solutions to the space industry, combining standard rad-hard products (processors, DSP standard ASICs and memories), low gate count re-programmable FPGAs, a FPGA/PLD conversion service and a complete ASIC offering (up to 5 million gates)," he added.

The chip is currently available in either 130 or 240 PCI compliant I/Os, housed in MQFPF160 and MQFPF 256 packages, respectively. Upon request, Atmel can offer up to 384 I/O capability in larger packages.

Atmel has upgraded the available commercial AT40K and FPSLIC(R) series design tools, including the System Designer/Integrated Development System softwares and the hardware daughter boards to fit the rad-hard FPGA package options. The AT40KEL-DK design kit offers user-defined and reusable hard macro capability and hard macro generators.

The AT40KEL040 is available to any Atmel standard space quality grades, including QML Q & V and support the Standard Military Drawing (SMD) specifications 5962-03250.

Prototypes pricing is $1,400/EU1, 150 each in MQFPF160 package. Pricing for the AT40KEL040 QMLV quality grade in MQFPF160 package is $6,000/EU5, 000 for 25 units. The AT40KEL040 is available now.

Development has been supported by the Centre National d'Etudes Spatiales (CNES), the French space agency.

  Footnote
   PCI:  Peripheral Component Interconnect

RECONF: Is a project funded by the European Commission. It aims to develop the required design environment to allow the efficient use of dynamically reconfigurable FPGAs.

About Atmel

Founded in 1984, Atmel Corporation is headquartered in San Jose, California with manufacturing facilities in North America and Europe. Atmel designs, manufactures and markets worldwide, advanced logic, mixed-signal, nonvolatile memory and RF semiconductors. Atmel is also a leading provider of system-level integration semiconductor solutions using CMOS, BiCMOS, SiGe, and high-voltage BCDMOS process technologies.

NOTE: Atmel, the Atmel logo, Cache Logic(R) and FPSLIC(R) are registered trademarks of Atmel Corporation or its subsidiaries. Other terms and product names in this document may be the trademarks of others.

Information

Information on Atmel's AT40KEL040 product can be retrieved at: http://www.atmel.com/dyn/products/product_card.asp?pn=AT40KEL040

Press Contacts

Philippe Faure, Marketing Communication Manager - Microcontrollers Tel: +33 2 40 18 18 87, Email: philippe.faure@nto.atmel.com

Veronique Sablereau, Corporate Communications Manager - Europe Tel: +33 1 30 60 70 68, Email: veronique.sablereau@atmel.com

Clive Over, Director of Press Relations - USA and Asia Tel: +1-408-451-2855, Email: cliveover@atmel.com

CONTACT: Philippe Faure, Marketing Communication Manager -
Microcontrollers, +33 2 40 18 18 87, or philippe.faure@nto.atmel.com; or
Veronique Sablereau, Corporate Communications Manager - Europe,
+33 1 30 60 70 68, or veronique.sablereau@atmel.com; or Clive Over, Director
of Press Relations - USA and Asia, +1-408-451-2855, or cliveover@atmel.com

Web site: http://www.atmel.com/